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sav07_homework_2 [2007/03/29 22:19] vkuncak |
sav07_homework_2 [2007/03/30 13:58] vkuncak |
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====== Homework 2 ====== | ====== Homework 2 ====== | ||
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For in depth understanding you can also read references in there, in particular the relevant Wilfrid Hodges model theory book sections. | For in depth understanding you can also read references in there, in particular the relevant Wilfrid Hodges model theory book sections. | ||
- | **Hint**: You should be able to reduce the problem to reasoning about conjunctions and generate a disjunction over total orders over terms of form v+c. Alternatively, you may be able to use some ideas of [[http://citeseer.ist.psu.edu/71579.html|Fourier-Motzkin elimination]]. | + | **Hint**: You should be able to reduce the problem to reasoning about conjunctions and generate a disjunction over total orders over terms of form v+c. Alternatively, you may be able to use some ideas of [[http://citeseer.ist.psu.edu/71579.html|Fourier-Motzkin elimination]], but it is not necessary for this problem to have an efficient algorithm, only an algorithm that works in principle. |
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==== Verification condition generator ==== | ==== Verification condition generator ==== | ||
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1. Implement a verification condition generator that takes abstract syntax trees of the following form | 1. Implement a verification condition generator that takes abstract syntax trees of the following form | ||
- | S ::= (x=T) | + | S ::= (v=T) |
| assume(F) | | assume(F) | ||
| assert(F) | | assert(F) | ||
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| while [inv F] (F) { S } | | while [inv F] (F) { S } | ||
| if (F) { S } else { S } | | if (F) { S } else { S } | ||
- | T ::= T+T | T-T | K*T | v | + | T ::= T+T | T-T | K*T | v | K |
- | A ::= T=T | T < T | + | A ::= T=T | T < T | True | False |
F ::= A | (F&F) | (F|F) | ~F | ALL v.F | EX v.F | F ::= A | (F&F) | (F|F) | ~F | ALL v.F | EX v.F | ||
K ::= 0 | 1 | 2 | ... | K ::= 0 | 1 | 2 | ... |